ACDRC Smart EDA & Analog Circuit Design Workshop
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4 – 6 April 2025
- FEE CTU in Prague + online streaming platforms (Teams, Zoom)
Step into the world of smart chip design! Join our 3-day Smart EDA and Analog Circuit Design workshop, designed to enhance your circuit optimization and design skills. Whether you're a beginner or have some experience, this workshop will provide essential tools to build modern, high-performance circuits in today's competitive electronics industry.
This hands-on workshop will equip you with essential techniques to optimize circuit performance. Explore key concepts such as design optimization, PPAR & variation, and backend EDA workflows, alongside powerful algorithms for floorplanning, partitioning, placement, and routing. Gain practical insights into layout automation and circuit design strategies to streamline your development process. Whether you're a beginner or looking to refine your expertise, this workshop will help you design smarter, faster, and more efficiently.
Schedule
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4. 4. 2025, Friday
Foundations of EDA & Analog Chip Design
10:00 - 12:00: Lecture
13:00 - 16:00: Practical exercises -
5. 4. 2025, Saturday
Circuit Partitioning and Floorplanning
10:00 - 12:00: Lecture
13:00 - 16:00: Practical exercises -
6. 4. 2025, Sunday
Hands-on practice
Lecturer
Dr. Yu-Guang Chen
The lectures are led by Dr. Yu-Guang Chen, associate professor from the National Tsing-Hua University in Hsinchu City, Taiwan. In his research he focuses on Electronic Design Automation (EDA), Reliable and aging-aware IC design and optimization, Computing-in-memory architecture design and optimization, AI for EDA, AI Accelerator design and optimization and Hardware Security.
FAQ
How much does it cost?
The workshop is free of charge.
Who can join the workshop?
The event is intended for the general public. However, basic familiarity with the topic is recommended.
I am a student. Will I get any ECTS?
FEE students will get 1 credit.
Do I have to join personally?
If you are not able to travel to Czech Republic, you can join us on a streaming platform (MS Teams/Zoom). You still need to register. We will send you a link to join before the event.
Where will the practical exercises take place?
In the Cadence computer laboratory at the Faculty of Electrical Engineering - Public web - Czech technical university in Prague
Where can I get accomodation in Prague?
You can stay in the Masaryk Dormitory near the faculty.
In what language will the workshop be held?
In English.
This workshop is organised in the frame of The Advanced Chip Design Research Center (ACDRC), which aims to foster innovation and collaboration in semiconductor research and education between Taiwan and the Czech Republic. ACDRC is established under the Taiwan-Czech Democratic Partners Supply Chain Resilience and Capacity Building Cooperation Plan for 2022-2026. The center is dedicated to cultivating integrated circuit design talent across various fields and fostering the development of the semiconductor industry ecosystem in the Czech Republic.
You can find recordings of ACDRC workshops on our Youtube channel.
This project is a collaborative effort between Taiwanese and Czech organizations, specifically NARLabs and CyberSecurityHubcz, which serves as the main execution unit, complemented by a consortium that includes the Czech Technical University, Masaryk University and Brno University of Technology.
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